Flash memory is known as one of semiconductor memory devices. Specifically, NAND type flash memory is widely used because of its low cost large capacity.
In addition, many techniques have been proposed for further increasing the capacity of NAND type flash memory. One of the techniques includes a structure where memory cells are arranged three-dimensionally. In a semiconductor memory device of such a three-dimensional type, memory cells are arranged along a certain direction. Conductive layers extend in a direction that is parallel to a substrate, from the memory cells arranged along the certain direction, respectively, and are laminated in a direction perpendicular to the substrate.
In such a semiconductor memory device of a three-dimensional type, increasing the number of the lamination of the memory cells and the conductive layers leads to increase in number of transistors for connecting the memory cells and the external circuit. This may cause increase in the occupation area of the transistors. Accordingly, it is requested that the occupation area of the transistors be reduced.